1. Field of the Invention
The present invention relates to technology for data protection by transferring data being held in a volatile memory to a non-volatile memory.
2. Description of the Related Art
In apparatuses having a large capacity and requiring rapid data processing, a DRAM (dynamic RAM), which is a volatile memory, is generally used, and in recent years, a clock synchronous type thereof, that is, an SDRAM (synchronous DRAM) has become mainstream. In apparatuses that use such a volatile memory, there is a possibility that occurrence of an unexpected shutoff of power, such as a blackout, may cause a loss of data held in the memory and inflict a disadvantage on a user. Thus, technology for avoiding loss of data held in the memory under such conditions has been proposed.
Japanese Patent Laid-Open No. 08-161236 discloses a data loss avoiding method in which backup power is supplied to a volatile memory to allow the volatile memory to hold data and if the power supply voltage decreases to a predetermined level when power is shut off, the data held in the volatile memory is saved to a flash memory.
Moreover, Japanese Patent Laid-Open No. 06-028267 and Japanese Patent Laid-Open No. 06-231053 also disclose a method in which in order to similarly avoid a data loss, the power supply status is monitored and data is saved from a volatile memory to a non-volatile memory if it is determined that it is difficult to hold data.
In this manner, a highly reliable and practical apparatus has been realized by adopting a configuration in which a volatile memory that allows quick access is used during normal operation and, once an anomaly occurs and it becomes difficult to hold data, data whose loss would be inconvenient is saved to a flash memory.
However, in the case of saving data from the above-described DRAM to the flash memory, there is a necessity to supply backup power for ensuring operation until the completion of data transfer. This leads to a problem in that an increase in the amount of data to be saved results in an increase in the cost of a battery component serving as a source of the backup power.
In particular, since the DRAM, which is the source of transferred data, is required to continue a refresh operation for maintaining data until the saving is finished, and electric power expended for that operation increases with the data holding time, it is necessary that data saving be completed in as short a time as possible. On the other hand, the flash memory, which is the destination of saved data, has a very slow rewriting speed when compared with the readout speed from the DRAM. Thus, in the data saving operation as described above, writing to the flash memory is a bottleneck, and readout from the DRAM has to wait, which consequently makes it difficult to reduce electric power required to maintain data.
Furthermore, in recent years, with the improvement of system performance, the processing performance of a memory unit configured of a DRAM has been improved by increasing not only the operating speed but the data bus width. Since the increase in the data bus width is achieved by arranging and simultaneously operating a plurality of devices, the supply current required for operation increases with the number of devices. Therefore, the battery component used for the source of the above-described backup power is required to have a performance to cope with such increase in the supply current, and this has been a factor in a further cost increase.